I am an accelerated Mathematics & Computer Science student at the University of Illinois Urbana-Champaign (expected graduation May 2028). My work spans embedded deep learning compilers, Triton GPU kernel optimization, continual LLM adaptation, and market microstructure signal research.
I study Mathematics and Computer Science at the University of Illinois Urbana-Champaign on an accelerated graduation track (May 2028). My focus lies at the intersection of machine learning systems, low-level performance engineering, and rigorous mathematical modeling.
In deep learning infrastructure, I built the Tiny Tensor Compiler—an end-to-end Python-to-C compilation pipeline featuring static memory planning and formal Z3 SMT verification targeting ARM Cortex-M0+ on RP2040—as well as hand-optimized fused RMSNorm GPU kernels in Triton with autotuning and FP32 accumulation.
In machine learning research and quantitative modeling, I developed Hierarchical Adapter Fusion (HAF), a variational hypernetwork and FAISS-backed continual learning framework for LLMs, and designed high-throughput quantitative market data pipelines (NASDAQ ITCH 5.0) and Markov chain debt cascade models.
Education
Academic foundation and milestones.
University of Illinois Urbana-Champaign
Aug 2026 – May 2028 (Expected Graduation)
Bachelor of Science, Mathematics and Computer Science · Champaign, IL
Accelerated degree due to 90 transfer credits earned through prior college coursework during high school
Relevant Coursework: Data Structures, Algorithms, Probability and Statistics, Discrete Mathematics, Multivariable Calculus
Research
Current and recent research tracks.
Hierarchical Adapter Fusion (HAF)
August 2025 – Present
Independent Research: Continual Learning for LLMs
Architected a variational hypernetwork with annealed KL regularization that generates rank-8 LoRA adapter weights directly from task embeddings in a single forward pass, reducing adaptation time by 15x compared to standard LoRA.
Engineered a parametric memory retrieval system using a FAISS flat index to condition adapter generation on top-k nearest historical task representations, achieving near-zero backward transfer degradation across sequential benchmark tasks.
Built a parallel evolutionary candidate selection pipeline generating 20 perturbed latent distributions under 4-bit quantization on a 16GB GPU, validating accuracy on GSM8K and OpenCodeInstruct tasks.
1st Place, Brevard District Science FairMerit Award, Florida State Science Fair
Quantized PyTorch CNN to C compiler pipeline for ARM Cortex-M0+ (RP2040) · 2026
A full compiler pipeline taking quantized PyTorch CNNs to bit-exact, standalone C executing on ARM Cortex-M0+ (RP2040), featuring graph live-range memory planning and formal SMT equivalence verification.
PythonCPyTorchARM Cortex-M0+RP2040Z3 SMT
Built a full compiler pipeline in Python (IR → static memory planner → C codegen) taking a quantized PyTorch CNN to bit-exact, running C on ARM Cortex-M0+ (via a RP2040), validated against the PyTorch model on 2,000+ test vectors with zero mismatches.
Designed a static memory allocator using live-range analysis and in-place buffer aliasing that cut SRAM usage 46% (388B→208B) versus naive allocation; verified with an independently re-derived overlap check and unit tests on synthetic graph.
Formally verified numerical equivalence between a reference implementation and a hand-optimized production code path using SMT solving (Z3) over the full input domain (2^144 combinations).
Fused RMSNorm Kernel
Completed
Hand-optimized Triton GPU kernel for RMSNorm forward and backward passes · July 2026
A hand-optimized Triton GPU kernel fusing RMSNorm forward and backward passes, minimizing high-bandwidth memory (HBM) round-trips and matching torch.compile speed.
TritonPyTorchCUDAPython
Implemented a fused RMSNorm kernel in Triton from scratch with FP32 accumulation registers to guarantee numerical stability across FP16 and BF16.
Improved effective memory bandwidth by approx. 4x compared to Eager PyTorch on the forward pass (~240 GB/s on NVIDIA T4) and by approx. 2.7x on the backwards pass (~54 GB/s), matching torch.compile forward memory bandwidth.
Integrated triton.autotune to dynamically sweep optimal tile configurations and block sizes based on input tensor dimensions.
Coupled non-homogeneous Markov chain debt cascade model · February 2026
Engineered a mathematical risk simulator using coupled non-homogeneous Markov chains with hazard multipliers to model debt escalation and bankruptcy probabilities.
PythonNumPyMarkov ChainsMathematical Modeling
Engineered a 9-state coupled, non-homogeneous Markov chain to model debt cascades and bankruptcy risks, incorporating a loss-chasing hazard multiplier on credit deterioration edges.
Calibrated state-transition dynamics and demographic parameter sweeps using public health and economic datasets from the US and UK.
Submission placed in the top 15% nationally in the MathWorks Math Modeling Challenge.
Undergraduate in Mathematics & Computer Science at the University of Illinois Urbana-Champaign on an accelerated graduation track (May 2028). My work focuses on machine learning systems, embedded tensor compilers, Triton GPU kernels, and continual learning architectures for LLMs. Key projects include the Tiny Tensor Compiler (Python IR → static memory allocator → C on ARM Cortex-M0+ with Z3 SMT verification), fused RMSNorm kernels in Triton, and a 9-state Markov chain debt cascade model for the MathWorks Math Modeling Challenge (Top 15%).